Circuit review & bench-test guide

AXO-006 — SSD1306 OLED carrier PMOD module

Design-stage — board not yet fabricated

Document purpose#

Component-level explanation and bench-test plan for the axo-006-oled carrier, based on generate_design.py, the module README.md, and the SSD1306 controller datasheet (the plug-in breakout's controller). The carrier has never been fabricated; all values are verification targets. Because this is a carrier, the plug-in breakout is in scope and gets a mandatory pin-order check (Section 4a) before power.

1. What the board does#

A socket carrier that adapts a common 0.96" SSD1306 128×64 I2C OLED breakout to the AruviX PMOD. It provides the I2C bus, cuttable pull-ups, and decoupling; the display module itself carries the panel, its charge pump, and the SSD1306.

PMOD J1 ── SCL/SDA ──> [4.7k pull-ups JP1/JP2] ──> J2 socket ──> SSD1306 breakout
           3V3/GND ──> C1/C2 ──> J2 (VCC/GND)

2. Safety and scope boundaries#

3.3 V only. The SSD1306 breakout runs 3.3 V logic and has its own on-board charge pump for the ~7.5 V panel bias — do not feed it 5 V unless the specific breakout documents a 5 V regulator.
Standalone bench: 3.3 V current-limited into 3V3/GND; set ~50 mA (a 128×64 OLED draws ~10–20 mA lit).
Unreleased prototype; no ESD/EMC qualification.

4. Interfaces#

J1 PMOD Type 6 I2C: 3 SCL, 4 SDA, 9/10 bus repeat, 5/11 GND, 6/12 3V3. Pins 1/2/7/8 unused.
J2 1×4 pin socket for the breakout.
JP1/JP2 4.7 k pull-up disconnects.

4a. PLUG-IN VERIFICATION (do this before first power)#

0.96" SSD1306 breakouts ship in two pin orders — GND VCC SCL SDA and VCC GND SCL SDA. The carrier silkscreen labels one order (GND/VCC/SCL/SDA). A swapped VCC/GND will destroy the breakout. Before plugging in:

Read the breakout's own silkscreen. Compare to J2's labels.
If they differ, do not force orientation — the breakout must be wired to match, or use jumper leads. Buzz out J2 pin 1 → the carrier GND net and confirm it matches the breakout's GND pin.
Confirm the breakout is a 3.3 V I2C variant (not the SPI 7-pin version).

5. Component-by-component review#

J2 (1×4 socket): the breakout interface. If a pin is mis-seated: no ACK, or (VCC/GND swap) destroyed module.
R1, R2 4.7 kΩ (SDA, SCL pull-ups): bus termination. Many breakouts also carry pull-ups — two 4.7 k in parallel = 2.35 k, still fine, but if a third device joins, cut JP1/JP2 here. If absent and the breakout lacks its own: no ACK.
JP1/JP2: pull-up disconnects.
C1 100 nF + C2 10 µF: decoupling at the socket. If absent: the charge pump's switching disturbs the rail; display may fail to init or flicker.

6. Datasheet summary (SSD1306)#

128×64 dot-matrix OLED driver; 1 KiB GDDRAM. I2C address 0x3C (default) or 0x3D (strap). VDD 1.65–3.3 V logic; VCC panel 7–15 V from the internal charge pump (enable command 0x8D, 0x14).
Control byte selects command (0x00) vs data (0x40) stream.
Init needs: display off (0xAE), set mux/offset/clock, charge-pump on, memory addressing mode, contrast, display on (0xAF). Panel is dark until 0xAF.

7. Expected values before bench testing#

Idle SDA/SCL: 3.3 V. Address ACK at 0x3C (scan first — 0x3D possible).
After the init sequence + a full-RAM write of 0xFF: all pixels lit, ~15–20 mA.
3V3 rail steady within a few tens of mV under the charge-pump load.

8. Manual review checklist#

[ ] J2 label order matches the intended breakout (Section 4a).
[ ] R1/R2 present; JP1/JP2 bridged by default.
[ ] C1/C2 close to J2 VCC.
[ ] No 5 V anywhere on this board.

9. Ordered bench-test procedure#

A. Unpowered: with the breakout removed, buzz J2: pin order vs silkscreen, VCC↔3V3 net, GND↔GND net, SCL/SDA to the PMOD. Confirm no VCC-GND short.

B. Plug-in check: verify the breakout's silkscreen order matches J2 (Section 4a). Seat it fully.

C. Power, idle: 3.3 V ≤50 mA. Confirm idle current low, bus idle-high, panel dark (expected before init).

D. Bus bring-up: I2C scan → expect ACK at 0x3C. If nothing, recheck plug-in orientation immediately (do not leave a mis-powered module energized).

E. Init + fill: play the SSD1306 init sequence, then write 0x40 followed by 1024 bytes of 0xFF. Expect a fully lit screen. Write 0x00 ×1024 → blank.

F. Pattern: draw a checkerboard (0x55/0xAA alternating) to confirm column/ page addressing and no stuck segments.

10. Troubleshooting map#

No ACK: wrong plug-in orientation (check FIRST), pull-ups cut, wrong breakout variant (SPI not I2C), or 0x3D address.
ACK but dark: charge pump not enabled (0x8D,0x14) or 0xAF not sent — firmware, not hardware.
Flicker/partial: decoupling or a marginal 3.3 V supply current limit.

11. Bench record template#

Board: axo-006  Breakout P/N:____  Pin order matched: [ ]
Idle current: ____ mA   ACK address: 0x____
Full-fill current: ____ mA   Checkerboard clean: [ ]
Notes:

12. Review conclusion#

The carrier is trivial (a socket, two pull-ups, two caps); all the risk is in the plug-in step, where a VCC/GND swap is fatal. The Section-4a check is the single most important action. Once a known-good breakout initialises, this board is the platform's framebuffer-graphics starting point.