Sensor modules
AXS-044 — PMS5003 particulate-matter carrier PMOD module
Catalog #44 in the AruviX sensor line, level L3 (UART, fixed binary frames).
Circuit review & bench-test guide →
Components#
Every placed component, with the reason it is on the board. Extracted directly from the schematic, so this cannot drift from the design.
| Ref | Value | What it does on this board | Part number | Footprint |
|---|---|---|---|---|
C1 |
100nF 16V X7R | PMS5003 supply decoupling at the header | GRM188R71C104KA01DMurata |
C_0603_1608Metric |
C2 |
10uF 10V X5R | Fan start-up bulk reservoir on the 5 V feed | GRM21BR61A106KE19LMurata |
C_0805_2012Metric |
J1 |
PMOD PLUG 2x6 | PMOD peripheral plug (Digilent spec 1.2) | not selected generic |
PinHeader_2x06_P2.54mm_Horizontal |
J2 |
PMS5003 (2x5 1.27mm) | PMS5003 header, pad N = sensor pin N: 1/2 VCC(5V), 3/4 GND, 5 RESET, 7 RX, 9 TX, 10 SET | not selected generic Datasheet ↗ |
PinHeader_2x05_P1.27mm_Horizontal |
J3 |
EXT 5V IN | External 5 V for the PMS5003: 1 +5V, 2 GND (common with PMOD GND) | not selected Phoenix Contact |
TerminalBlock_Phoenix_MKDS-1,5-2-5.08_1x02_P5.08mm_Horizontal |
R1 |
100R | Series protection on the sensor-driven UART TX line (3.3 V logic) | RC0603FR-07100RLYageo Datasheet ↗ |
R_0603_1608Metric |
R2 |
10k | SET pull-up: sensor runs (normal mode) when the host leaves pin 1 alone | RC0603FR-0710KLYageo Datasheet ↗ |
R_0603_1608Metric |
R3 |
10k | RESET pull-up: sensor out of reset when the host leaves pin 7 alone | RC0603FR-0710KLYageo Datasheet ↗ |
R_0603_1608Metric |
Signals#
Net labels used in the schematic, which are also the names the HDL top level should use.
3V3 EXT_5V GND PM_RESET_N PM_SET PM_TX RXD TXD
Production status#
| Schematic ERC | 0 violations |
|---|---|
| PCB layout | complete |
| DRC | 0 violations |
| Fab package | exported (24 gerbers + drill + CPL + BOM) |
| Fabricated | no — design stage only |
Source: boards/sensor-modules/axs-044-particulate
Catalog #44 in the AruviX sensor line (../README.md), level L3 (UART, fixed binary frames).
Status: schematic generated, ERC clean (0/0), netlist reviewed. PCB layout not started. Not released.
What it teaches#
Air-quality sensing over a fixed-format binary UART: the PMS5003 streams 32-byte frames (start 0x42 0x4D, PM1.0/PM2.5/PM10 in two calibrations, particle-count bins, 16-bit checksum) at 9600 baud. Plus power-mode control: SET (sleep) and RESET are host GPIOs on this carrier.
The 5 V requirement (read this first)#
The PMS5003 is 5 V-powered — its internal fan needs 5 V and draws roughly 100 mA. Like AXS-024, this carrier takes external 5 V on the J3 screw terminal (EXT_5V net) with its ground common to the PMOD ground plane. The sensor's UART/SET/RESET logic is 3.3 V (internally regulated), so the signal lines go to the PMOD directly. Never feed 5 V into any PMOD pin.
J2 pin-numbering warning#
The PMS5003 mates through a 1.27 mm 2×5 connector on its supplied cable. J2 is wired so that KiCad pad N = PMS5003 connector pin N:
| PMS pin | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 |
|---|---|---|---|---|---|---|---|---|---|---|
| Function | VCC 5V | VCC | GND | GND | RESET | NC | RX | NC | TX | SET |
The generic KiCad 2×5 header footprint numbers pads odd/even by row, which happens to place pin 1/2 at the same end as the Plantower drawing — but the mating orientation depends on the shrouded header and cable used. Flagged for verification before fab: confirm pad-N-to-pin-N against the physical connector, cable, and a purchased PMS5003.
Design#
- 100 Ω series (R1) on the sensor-driven TX line.
- SET and RESET pulled up to 3V3 with 10 k on-module (sensor runs and stays out of reset if the host leaves pins 1/7 unconfigured); both are optionally host-driven on PMOD pins 1 (
PM_SET) and 7 (PM_RESET_N). - 100 nF + 10 µF on the
EXT_5Vfeed (fan start-up). - PMOD Type 3 UART + control extras.
| PMOD pin | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Net | PM_SET | TXD | RXD | NC | GND | 3V3 | PM_RESET_N | NC | NC | NC | GND | 3V3 |
Regenerate#
python3 generate_design.py
Remaining for release#
- [ ] PCB layout, DRC, fab
- [ ] Pin the 1.27 mm 2×5 shrouded header and the Phoenix terminal orderable parts (MPNs are
TBD:) - [ ] Verify J2 pad-to-pin mapping against a physical PMS5003 + cable
- [ ]
hdl/: UART RX, frame parser + checksum, sleep/wake sequencing, testbench, ECP5 demo - [ ] BOM export and availability check, design-review checklist