Circuit review & bench-test guide

AXO-017 — microSD card PMOD module

Design-stage — board not yet fabricated

Document purpose#

Component-level explanation and bench-test plan for axo-017-microsd, from generate_design.py, the module README.md, and the Hirose DM3AT socket + SD Physical Layer (SPI mode) specifications. Never fabricated; values are verification targets. This is a storage keystone for the standalone-computer path (SPI-mode SD → FAT reader → AruviOS block driver).

1. What the board does#

Exposes a microSD card in SPI mode on the PMOD: ~CS, MOSI(CMD), MISO(DAT0), SCK(CLK), plus a card-detect switch. All SD lines carry the pull-ups the SD spec requires in SPI mode.

PMOD J1  ~CS/MOSI/MISO/SCK (1/2/3/4) ─> J2 microSD (DM3AT)
         CD (7, 10k PU + 100R) <── card-detect switch
         DAT1/DAT2 idle-high 10k pull-ups ; all SD lines 10k to 3V3

2. Safety and scope boundaries#

3.3 V only — microSD is a 3.3 V interface; never apply 5 V. PMOD host or 3.3 V bench supply (a card draws tens of mA, spikes to ~100 mA on write).
Cards are hot-insertable mechanically, but bring up power before relying on card-detect.
Unreleased prototype.

4. Interfaces#

J1 PMOD Type 2A SPI: 1 ~CS (DAT3), 2 MOSI (CMD), 3 MISO (DAT0), 4 SCK (CLK), 7 CD (card detect), 5/11 GND, 6/12 3V3.
J2 Hirose DM3AT push-push microSD socket with detect switch.

5. Component-by-component review#

J2 DM3AT (microSD socket, card-detect): the card interface. Pins map SD DAT3/CMD/DAT0/CLK to the SPI signals; the mechanical detect switch (pins 9/10 on the DM3AT) closes when a card is seated. If the detect switch pin is mis-wired: card-detect reads wrong (cosmetic — SPI still works). If a signal pad is open: init fails at CMD0.
10 kΩ pull-ups on all SD lines (CMD, DAT0–3, CLK): the SD spec requires pull-ups on all lines in SPI mode, even the unused DAT1/DAT2, to prevent the card entering a wrong mode. If DAT1/DAT2 pull-ups absent: some cards misread the bus width / enter SD-mode and refuse SPI init — a classic subtle failure.
CD network: 10 kΩ pull-up + 100 Ω series: the detect line to the PMOD. If pull-up absent: CD floats. If series R absent: host miswire shorts the switch node.
C1 100 nF + C2 10 µF: decoupling; the 10 µF covers write-current spikes. If bulk absent: rail sag during writes → corruption/timeouts.

6. Datasheet / spec summary (SD SPI mode)#

2.7–3.6 V. SPI mode 0. Init must start at 100–400 kHz, then switch to full speed (up to 25 MHz) after init.
Init sequence: ≥74 clocks with ~CS high, then:
CMD0 (GO_IDLE) with ~CS low → expect R1 = 0x01 (idle).
CMD8 (SEND_IF_COND, 0x1AA) → R7; 0x1AA echo = v2 card.
ACMD41 (CMD55 then ACMD41, HCS bit) polled until R1 = 0x00 (ready).
CMD58 (read OCR) → CCS bit distinguishes SDHC/SDXC.
Then CMD17/CMD24 for single-block read/write (512-byte blocks, 0xFE start token).
All SD lines pulled up in SPI mode per the physical-layer spec.

7. Expected values before bench testing#

No card: CD indicates empty; bus idle-high.
Card inserted, ≥74 clocks then CMD0 → R1 = 0x01.
CMD8 → 0x1AA echoed (modern card); ACMD41 loop → 0x00; CMD17 block 0 returns 512 bytes + valid CRC token.

8. Manual review checklist#

[ ] 10 k pull-ups on all SD lines incl. DAT1/DAT2.
[ ] CD line: 10 k pull-up + 100 Ω series.
[ ] 10 µF bulk near J2.
[ ] No 5 V anywhere.

9. Ordered bench-test procedure#

A. Unpowered: buzz J2 pads to J1; confirm pull-ups on all SD lines; verify CD switch continuity when a card is inserted; no rail short.

B. Power, empty: 3.3 V. Confirm bus idle-high; CD reads "empty."

C. Insert card: confirm CD flips to "present."

D. Init at low clock: clock ≥74 cycles with ~CS high (400 kHz), then CMD0 → expect R1 = 0x01. If not, recheck power, pull-ups (esp. DAT1/DAT2), and MISO continuity.

E. Full init: CMD8 (expect 0x1AA), ACMD41 loop to 0x00, CMD58 for SDHC/SDXC. Then raise SCK to full speed.

F. Block I/O: CMD17 read block 0 (partition/boot sector), verify 512 bytes + start token 0xFE. Optionally CMD24 write a scratch block on a disposable card and read it back; watch the 10 µF hold the rail during the write.

10. Troubleshooting map#

CMD0 never returns 0x01: insufficient warm-up clocks, MISO open, or missing pull-ups (card in wrong mode — check DAT1/DAT2 pull-ups first).
Init stalls at ACMD41: some cards need many poll iterations — allow ~1 s.
Write corruption/timeouts: bulk decoupling / current limit too low.
CD wrong but I/O works: detect-switch wiring (cosmetic).

11. Bench record template#

Board: axo-017  Card P/N:____
CD empty/present toggles: [ ]
CMD0 R1: 0x____ (exp 01)  CMD8 echo 0x1AA: [ ]  ACMD41->00: [ ]
Card type (CCS): SDSC/SDHC   Block-0 read OK: [ ]
Notes:

12. Review conclusion#

The subtle, must-verify detail is pull-ups on every SD line including the unused DAT1/DAT2 — omitting them is the classic reason a card refuses SPI init. After that it's the standard warm-up-clocks → CMD0(0x01) → CMD8 → ACMD41 → CMD58 sequence, then full-speed block I/O with the 10 µF holding the rail through writes.