← AXS-009

Circuit review & bench-test guide

AXS-009 — BME280 environment sensor PMOD module

Document purpose#

This document explains the axs-009-bme280 prototype at component level and turns the design evidence into a practical manual-review and bench-test plan. It is based on the generated schematic (generate_design.py, rev 0.1-schematic), the module README, and the Bosch BME280 datasheet.

The board is a schematic-only prototype: ERC is clean (0/0), but no PCB has been laid out and no board has ever been fabricated or powered. There are no recorded bench results. Every numeric value in this guide — voltages, currents, register contents, timings, compensation results — is a verification target taken from the schematic and the manufacturer datasheet, not a measured result. Nothing below proves that an assembled board works or is safe.

1. What the board does#

The board puts a Bosch BME280 combined temperature / humidity / barometric- pressure sensor on the AruviX PMOD template (Type 6 extended, I2C). The PMOD host supplies the single 3.3 V rail. CSB is hard-wired to 3V3 so the part latches into I2C mode; SDO is the I2C address bit, driven by solder jumper JP3 (default 1-2 = GND = 0x76; 2-3 = 3V3 = 0x77). The 4.7 kΩ bus pull-ups R1/R2 sit behind solder jumpers JP1/JP2 (bridged by default) so they can be removed when another chained module provides the pull-ups. Pins 9/10 repeat SCL/SDA for daisy-chaining; pins 1/2/7/8 are NC.

The BME280 is register-compatible with the BMP280 (AXS-008) for pressure and temperature; humidity adds the ctrl_hum register, a second calibration block, and a third compensation formula — the lesson is multi-register I2C reads and heavier fixed-point arithmetic in fabric.

Functional block diagram#

PMOD host (3.3 V)                 axs-009-bme280
┌──────────────┐      J1
│ 3V3 ─────────┼── 6/12 ──┬───────────────┬───────────────┐
│ GND ─────────┼── 5/11 ──┼───────┐       │               │
│              │          │       │      C1,C2         JP3 2-3 (0x77)
│ SCL ─────────┼── 3/9 ───┼──┬────┼──── U1 BME280         │
│ SDA ─────────┼── 4/10 ──┼──┼─┬──┼──── (CSB=3V3, I2C)    │
└──────────────┘          │  │ │  │       │ SDO ── JP3 ── GND (1-2, 0x76)
                          │  │ │  GND
              R2 4.7k ── JP2 │ │
              (3V3→SCL_PU)   │ R1 4.7k ── JP1
                             │ (3V3→SDA_PU)
                             └── bus repeated on J1 pins 9/10 for chaining

2. Safety and scope boundaries#

• 3.3 V logic only. Power only from a PMOD host or a current-limited bench supply at 3.30 V. BME280 absolute maximum on any supply pin is 4.25 V and on any interface pin VDDIO + 0.3 V; the board has no protection or regulation of its own.
• Current-limit the first power-on to ≈20 mA; the sensor draws microamps when healthy.
• ESD: HBM ±2 kV; use normal precautions on the LGA-8 pads.
• The humidity element is a protected polymer film but it is still exposed through the vent: no solvents, no conformal coating over the vent, no condensing environments during bring-up (operating range is 0–100 %RH non-condensing). Storage above 65 %RH degrades it; the datasheet's reconditioning procedure applies after soldering or humid storage.
• Absolute-maximum pressure 0–20000 hPa; do not pressure-blast the vent.
• Working I2C traffic is not an accuracy claim. ±3 %RH, ±1 hPa, ±0.5 °C are datasheet figures for correctly assembled production parts; this prototype has never been assembled or measured.

3. Power and control sequence#

1. The PMOD host (or bench supply) applies 3V3/GND on J1 pins 6/12 and 5/11. U1's VDD and VDDIO share the rail; C1/C2 decouple them. #FLG01/#FLG02 are ERC-only power-flag artifacts (no physical parts).
2. CSB tied to 3V3 selects and holds I2C mode (once CSB is ever pulled low the part locks into SPI until the next POR — tying it high removes that hazard). SDO is at GND via JP3 default → address 0x76.
3. Start-up ≤2 ms to first communication (VDD > 1.58 V, VDDIO > 0.65 V). During POR the NVM calibration is copied to registers (status 0xF3 bit 0 im_update).
4. The device wakes in sleep mode; sleep current 0.1 µA typical. Bus idles high through R1/JP1 and R2/JP2.
5. Configuration order is mandatory: write ctrl_hum (0xF2) first, then ctrl_meas (0xF4) — per datasheet §5.4.3, changes to ctrl_hum only become effective after a write to ctrl_meas. Then poll status 0xF3 or wait out the conversion, burst-read 0xF7–0xFE, and run the three compensation formulas.

4. Interfaces: PMOD pin map, jumpers, test points#

PMOD plug J1 (Type 6 extended)#

Solder jumpers#

Test points#

None on this design. Probe at the J1 pins, the jumper pads (JP1/JP2 bus, JP3 centre pad for SDO), and the C1/C2 pads for the rail. Add test points at layout time if bench work shows the need.

5. Component-by-component review#

Every reference designator in generate_design.py is covered.

6. Datasheet summary and design interpretation#

Official references: BME280 datasheet (BST-BME280-DS002) and the Bosch Sensortec BME280 product page. Check the latest revision before procurement.

7. Expected values before bench testing#

All targets, no measurements exist.

8. Manual schematic and assembly review checklist#

• Confirm U1 orientation against the clockwise-numbered LGA-8 footprint (Bosch_LGA-8_2.5x2.5mm_P0.65mm_ClockwisePinNumbering); the rotated-LGA error is destructive.
• Verify the net mapping recorded in generate_design.py: CSB → 3V3, SDI → SDA, SCK → SCL, SDO → JP3 common, VDD/VDDIO → 3V3, both GND pins → GND. Note this board's symbol pin placement differs from AXS-008 (Sensor:BME280 vs Sensor_Pressure:BMP280) — check nets, not positions.
• JP3 bridged 1-2 only; JP1/JP2 bridged; no double bridge on JP3.
• Buzz J1: 5/11 → GND, 6/12 → 3V3, 3–9, 4–10 continuity; 1/2/7/8 isolated.
• 3V3-to-GND resistance in both meter polarities: no hard short.
• Vent hole clear of solder, flux, and (later) conformal coating; humidity element requires airflow to the vent to respond within its ~1 s τ63.
• At layout time: C1/C2 within a few mm of U1; keep heat sources away from U1 (self-heating biases both temperature and RH readings). Cannot be closed until layout exists.

9. Ordered bench-test procedure#

Assumed setup: a PMOD host (3.3 V) or a current-limited 3.3 V bench supply on J1 pins 6/12 and 5/11, plus any I2C master on pins 3/4. Stop at the first abnormal result; record serials, equipment, ambient temperature/RH/pressure.

A. Unpowered inspection and resistance tests#

1. Complete the section 8 checklist under magnification.
2. 3V3-to-GND in both meter polarities: no hard short.
3. SDA-to-3V3 ≈ 4.7 kΩ; SCL-to-3V3 ≈ 4.7 kΩ.
4. JP3 common (SDO) to GND ≈ 0 Ω; to 3V3 open.
5. SDA-to-SCL open.

B. First power-on#

1. 3.30 V, ~20 mA current limit, no I2C master attached.
2. Supply current at the meter floor (sub-µA); >1 mA = fault, power off.
3. SDA and SCL both idle at 3.3 V. JP3 common at 0 V.

C. Bus idle and address-ACK scan#

1. Attach the master at 100 kHz. Idle levels remain 3.3 V.
2. Full scan 0x08–0x77: exactly one ACK at 0x76 (wire byte 0xEC).
3. Move JP3 to 2-3: exactly one ACK at 0x77 (wire byte 0xEE). Restore JP3 to 1-2 and rescan.
4. Extra ACKs indicate a bus bridge or master fault.

D. Chip-ID read and soft reset#

1. Read 0xD0: S 0xEC A 0xD0 A Sr 0xED A 0x60 N P. Exactly 0x60. 0x58 means a BMP280 was assembled instead — usable for P/T but the humidity lesson is gone; disposition the board.
2. Write 0xE0 ← 0xB6, wait ≥2 ms, re-read 0xD0 → 0x60; 0xF2 → 0x00; 0xF4 → 0x00; 0xF7/0xFA/0xFD → 0x80 each (reset states).

E. Calibration read: both blocks, including the H4/H5 nibble trap#

1. Burst-read 26 bytes from 0x88 (dig_T1…dig_P9 LSB-first, then 0xA1 = dig_H1). Then burst-read 7 bytes from 0xE1 (dig_H2…dig_H6).
2. Decode per datasheet Table 16, including the packed pair:

• dig_H4 = (0xE4 << 4) | (0xE5 & 0x0F) (signed 12-bit, sign-extended)
• dig_H5 = (0xE6 << 4) | (0xE5 >> 4) (signed 12-bit, sign-extended)

1. Reject all-0x00 / all-0xFF blocks. Plausibility: dig_T1 and dig_P1 unsigned in the tens of thousands; dig_H1/dig_H3 not 0xFF; signed words within a few times the BMP280-family example magnitudes. Two consecutive reads must match exactly.

F. First measurement — ctrl_hum ordering, then compensation sanity#

1. Write in this order: ctrl_hum 0xF2 = 0x01 (osrs_h ×1), then ctrl_meas 0xF4 = 0x27 (osrs_t ×1, osrs_p ×1, normal mode), then config 0xF5 = 0x00. The 0xF2 write takes effect only on the 0xF4 write.
2. Poll status 0xF3 bit 3 (measuring) until 0, or wait ~10 ms (exact maximum conversion time at ×1 oversampling: verify against datasheet chapter 9 measurement-time formula — not extracted into this guide).
3. Burst-read 8 bytes from 0xF7 (press msb/lsb/xlsb, temp msb/lsb/xlsb, hum msb/lsb). Assemble adc_P/adc_T (20-bit) and adc_H (16-bit).
4. Negative test of the ordering rule: soft-reset, write only 0xF4 = 0x27 (never touching 0xF2), measure — the humidity output must read 0x8000 (osrs_h still 0 = skipped). This confirms you can detect the classic bug. Reset and restore the correct order afterwards.
5. Cross-check your compensation implementation against the datasheet reference code (§4.2.3): the P/T formulas are identical to the BMP280's, whose worked example (adc_T=519888, adc_P=415148 with the example trim set → T=25.08 °C, P=100653.27 Pa) must be reproduced by your pipeline. For humidity the datasheet documents the output format by example: compensate_H returning 47445/1024 = 46.333 %RH (Q22.10). There is no full worked humidity input example in the datasheet — validate against the Bosch reference API (bme280_compensate_H_int32) with your part's own trim words.
6. Plausibility of live readings, indoor bench: temperature 15–35 °C, pressure 950–1050 hPa (adjust for lab altitude), humidity 20–80 %RH.
7. Stimulus checks: breathe gently from ~10 cm — RH must rise by tens of %RH within ~1 s (τ63 = 1 s) and decay back. Fingertip warmth raises temperature. A ~1 m altitude change moves pressure ~0.12 hPa.

G. JP1/JP2 pull-up jumper verification (chaining)#

1. Unpowered, jumpers bridged: SDA-to-3V3 ≈ 4.7 kΩ, SCL-to-3V3 ≈ 4.7 kΩ.
2. Cut JP1/JP2, verify under magnification: both lines to 3V3 now open (>1 MΩ; any slow drift is ESD-structure leakage, not a resistor).
3. Powered, pull-ups cut, no external pull-ups: scan fails (expected signature of an unpaired chained module).
4. Provide external 4.7 kΩ pull-ups (or a bridged partner module) and re-run C–F with identical expected results.
5. Re-bridge with solder to restore single-module default; re-verify step 1.

H. Chain test with AXS-008 (optional)#

1. Chain a BMP280 module on pins 9/10, this board's JP3 at 1-2 (0x76) and the partner at 2-3 (0x77), exactly one module keeping pull-up jumpers bridged.
2. Scan shows 0x76 and 0x77; chip IDs distinguish them: 0x60 here, 0x58 on the BMP280 — a deliberate lesson in identifying register-compatible siblings.

10. Troubleshooting map#

11. Bench record template#

12. Review conclusion#

The schematic is the same deliberately minimal I2C-module pattern as AXS-008 with the BME280 substituted: single rail, both supplies decoupled, CSB tied high so the interface can never latch into SPI, SDO pinned by JP3, and removable bus pull-ups for chaining. The design's correctness therefore hinges almost entirely on firmware/gateware discipline: the ctrl_hum-before- ctrl_meas write ordering, the two-block calibration readout with the dig_H4/dig_H5 nibble packing, and three chained fixed-point compensation formulas sharing t_fine.

Principal open risks: schematic-only status (no layout, DRC, fab outputs, or bench evidence); LGA-8 orientation and vent handling at assembly; humidity- element care (storage RH, reconditioning after reflow); and the unwritten fabric compensation pipeline, which must reproduce the datasheet reference vectors before any live reading is trusted.