← AXS-022

Circuit review & bench-test guide

AXS-022 — Dual IR reflective sensor PMOD module

Document purpose#

This document explains the axs-022-ir-reflective prototype at component level and turns the design evidence into a practical manual-review and bench-test plan. It is based on the implemented schematic generator (generate_design.py), the module README, the sensor-line conventions in ../README.md, and the Pmod-spec notes in ../../pmod-common/PMOD-SPEC-NOTES.md.

The board is a schematic-complete prototype only: ERC is clean (0 errors / 0 warnings, with one documented pin-matrix relaxation) and the netlist has been reviewed, but no PCB has been laid out, fabricated, or bench-verified. Every number below is a design target to verify on a first article, not proof that an assembled board works. One documentation discrepancy found during this review (LED current, section 5.2) is recorded for correction.

1. What the board does#

A 12-pin PMOD Type 1 (GPIO) module with two onsemi QRE1113GR reflective pairs (940 nm IR LED + phototransistor in one package) aimed at the surface for line-following and edge detection at roughly 1–3 mm range. Each LED runs continuously from 3V3 through a 100 Ω ballast; each phototransistor collector is loaded by 10 kΩ to 3V3 and pulled low over a reflective (white) surface. Two channels side by side give left/right line sensing (level L1 lesson). The analog collector swing behind the digital threshold is the teaching payload: surface albedo and distance are visible as voltage before the FPGA slices them.

Functional block diagram#

   3V3 ─┬─ R1 100R ── IR1_LED ──►|── GND     (U1 LED, ~21 mA)
        ├─ R2 10k ─── IR1_SENSE ─┬─ U1 collector, emitter ── GND
        │                        └─ R3 100R ──► PMOD pin 1  IR1
        ├─ R4 100R ── IR2_LED ──►|── GND     (U2 LED, ~21 mA)
        ├─ R5 10k ─── IR2_SENSE ─┬─ U2 collector, emitter ── GND
        │                        └─ R6 100R ──► PMOD pin 2  IR2
        └─ C1 100nF ── GND

   U1/U2 optics:  LED light ──► surface at ~1 mm ──► phototransistor
   white/reflective surface → transistor on → IRx low
   black/absent surface     → transistor off → IRx high (10k pull-up)

2. Safety and scope boundaries#

• 3.3 V logic module. Power only from a PMOD host socket (AruviX ECP5 rev-A or any 3.3 V Digilent-compatible socket) or a bench 3.3 V supply with the current limit at ~100 mA. Unlike most modules in the line this one draws real static current: ~42 mA for the two always-on LEDs, within (but a large share of) the Pmod-spec ~100 mA module guidance.
• Check plug orientation before first power (pin 1 is the rightmost pin of the upper row viewed from the module top with the connector toward you — Pmod spec 1.2.0 Figure 2, verified in PMOD-SPEC-NOTES.md).
• The IR emission is invisible. 940 nm at ~21 mA from a bare package is not an eye-safety hazard at bench distances, but do not stare into it at contact range, and remember a phone camera (front cameras usually lack IR filters) is the quick way to see that the LEDs are on.
• Ambient IR is a real interferer: incandescent lamps and direct sunlight contain strong 940 nm content and can pull IRx low with no target present. Characterize under the intended lighting; shield during threshold setup.
• The QRE1113 LED absolute maximum is 50 mA continuous / VR = 5 V. Never substitute the ballast below ~47 Ω (3.3 V worst case into the LED at VF min) without redoing this review.

3. Signal behavior and design intent#

1. Each IR LED conducts continuously: I_LED = (3.3 V − VF) / 100 Ω. With the fetched datasheet VF of 1.2 V typical / 1.6 V maximum at 20 mA, that is 21 mA typical, 17 mA at the VF-max corner — comfortably inside the 50 mA rating and near the 20 mA datasheet test condition.
2. Reflected 940 nm light drives the phototransistor. The datasheet coupled-transfer spec is IC(ON) = 0.10 mA min / 0.40 mA typ at IF = 20 mA, VCE = 5 V, aluminum-mirror target at d = 1 mm.
3. Into the 10 kΩ collector load from 3.3 V: a typical part over a good reflector wants 0.40 mA x 10 kΩ = 4 V of drop — more than the rail — so it saturates and IRx falls to VCE(sat) ≤ 0.3 V. A minimum-spec part delivers only 0.10 mA → 1.0 V of drop → IRx ≈ 2.3 V, which is not a legal CMOS low. The 10 kΩ load is sized for typical parts and real paper (90 % white paper reflects slightly less than the mirror test target); worst-case units may need the threshold treated analogically or the load revisited. This is the central thing the bench must measure.
4. Distance response (datasheet Fig. 1, IF = 10 mA, white 90 % paper and mirror): the coupled response peaks just under d = 1 mm, is roughly halved by ~2 mm, and falls to ~20 % by 3 mm — this verifies the "~1 mm optimal, usable to ~3 mm" claim and fixes the sensor-to-surface height the PCB/mechanics must hold.
5. With no target or a black target, the collector sees only dark current (≤100 nA) and optical crosstalk (≤1 µA with no reflective surface): ≤ ~11 mV of drop across 10 kΩ, so IRx idles within millivolts of 3.3 V.
6. Speed: datasheet tr/tf are 20 µs typical at RL = 1 kΩ, IC = 100 µA, and Fig. 7 shows times growing with load resistance — expect tens of µs, up to the order of 100 µs, with our 10 kΩ load. Irrelevant for line-following at robot speeds, but visible on a scope as soft edges; the digital sampling in fabric should not expect sharp transitions when the target moves slowly.

4. External interfaces#

No test points exist; probe resistor pads. The sense side of R3/R6 is the raw collector node (IRx_SENSE); the drop across R1/R4 gives LED current.

5. Component-by-component review#

5.1 Connector and sensors#

Key datasheet parameters for U1/U2 (all from the fetched rev 1.7.0 PDF): LED VF 1.2 V typ / 1.6 V max at 20 mA; IF max 50 mA continuous, 1 A pulsed (100 µs, T = 10 ms); LED reverse voltage 5 V; LED PD 75 mW. Peak emission 940 nm. Transistor VCEO 30 V, VECO 5 V, IC max 20 mA, PD 50 mW (both sides derate 1 mW/°C above 25 °C). Coupled: IC(ON) 0.10 min / 0.40 typ mA (IF = 20 mA, VCE = 5 V, mirror at 1 mm); crosstalk ≤ 1 µA; dark current ≤ 100 nA (VCE = 20 V); VCE(sat) ≤ 0.3 V; tr/tf 20 µs typ (RL = 1 kΩ). Operating −40 to +85 °C.

5.2 LED ballast, loads, protection, decoupling#

6. Datasheet summary and design interpretation#

Check the current onsemi orderable status and exact suffix (QRE1113GR, tape/reel) before procurement; the fetched PDF is the Fairchild-branded document that onsemi still serves for this part.

7. Expected values before bench testing#

Conditions: 3.3 V rail, ambient IR shielded, white = plain printer paper, black = matte black print/paper, distances set with a spacer stack.

8. Manual schematic and assembly review checklist#

• Confirm J1 pin-1 orientation and 3V3/GND on pins 6/12 and 5/11; buzz plug pins to nets (see PMOD-SPEC-NOTES.md).
• Verify U1/U2 orientation: pin 1 (anode) must sit on the R1/R4 net side. The QRE1113GR package marks pin 1; a rotated part is a dead channel, not a burned one, so it survives to confuse the bench.
• Measure R1/R4 = 100 Ω, R2/R5 = 10 kΩ, R3/R6 = 100 Ω.
• Confirm at layout review (pending): both sensors on the board edge, faces down, co-planar, and nothing (connector, passives) closer to the surface than the sensor faces — the 1 mm working height is smaller than most component heights.
• Confirm C1 present and not bridged.
• Note for the fab package: the generator's "~28 mA" heading text should be corrected to ~21 mA (section 5.2 finding) — do not ship contradictory numbers.

9. Ordered bench-test procedure#

Stop at the first abnormal result. Record board serial, host/supply, equipment, lighting conditions, target materials, and operator with every capture. Prepare a spacer stack: paper sheets (~0.1 mm each), or better, feeler gauges / machined spacers covering 0.5–5 mm.

A. Unpowered inspection and resistance tests#

1. Complete the checklist above under magnification.
2. Measure 3V3-to-GND resistance both polarities: expect the two LED branches to read as diode drops in one polarity (~1.2 kΩ-equivalent nonlinear) and higher in the other; a hard short means C1 or a bridge.
3. Diode-check each LED through R1/R4 (anode side at the resistor): forward drop ~1.1–1.3 V plus lead resistance in one polarity, open reversed.

B. First power and LED current verification#

1. Power from a current-limited 3.3 V bench supply (100 mA limit) or the PMOD host. Expect ~35–45 mA total; far less means an LED branch is open, far more means a short — stop.
2. Measure the drop across R1 and across R4 with a DMM. Compute each LED current (V/100 Ω) and each VF (3.3 − V). Targets: I ≈ 21 mA, VF ≈ 1.2 V typical; flag any channel outside 15–25 mA or VF outside 1.1–1.6 V.
3. Confirm both emitters glow using a phone front camera in a dim room.

C. Static levels: white / black / open#

1. Shield from incandescent light and sunlight. With no target within 50 mm, measure IR1 and IR2: expect ≥ 3.29 V.
2. Hold white printer paper flat at ~1 mm (one spacer thickness between sensor face and paper, then remove the spacer sideways or use a jig). Measure IR1/IR2: a typical unit reads ≤ 0.3 V. If a channel reads 0.5–2.5 V, it is a low-transfer (min-spec-side) unit — record it; this is the section 3 finding, not automatically a defect.
3. Repeat with matte black paper at 1 mm: record the level (expect close to the no-target value; glossy black behaves like a mirror at normal incidence — test both if the application surface is unknown).
4. Sanity-check ambient immunity: shine an incandescent lamp / sunlight at the sensor with no target and record how far IRx dips.

D. Distance response characterization (~1–3 mm)#

1. Fix the board face-down over a white target with the spacer stack setting the gap. Sweep: 0.5, 0.8, 1.0, 1.5, 2.0, 2.5, 3.0, 4.0, 5.0 mm. Record IR1 and IR2 voltage at each step.
2. Expected shape (datasheet Fig. 1): response is best (lowest voltage) around ~0.6–1 mm; if the typical unit saturates, the curve will look flat-bottomed near the peak — the voltage starts rising where the photocurrent falls back below 0.33 mA (3.3 V/10 kΩ), then climbs steeply past 2–3 mm.
3. Repeat the sweep with the black target: the curve should stay near the rail throughout; record any dip at the closest distances.
4. From the two curves, identify the usable height band where white-vs-black separation is maximal — expect it centered near 1 mm and degraded but usable at 3 mm. This number feeds the robot/chassis mechanical design.
5. Repeat for the second channel and overlay: record the matching error in mV at the chosen working height.

E. Line-follow threshold setup#

1. At the chosen working height, record V_white and V_black for each channel (from D). Compute the midpoint threshold V_th = (V_white + V_black)/2 per channel.
2. If the host samples IRx as plain LVCMOS GPIO: verify V_white is below the host's VIL (for the ECP5 at 3.3 V LVCMOS budget ~0.8 V) and V_black above VIH (~2.0 V) with margin. A low-transfer unit that only reaches 2.3 V over white fails this — such a board needs either a larger collector load (hardware rev), a comparator/ADC treatment, or a binned sensor swap. Record pass/fail per channel explicitly.
3. Dynamic check: move a printed black line (~15–20 mm wide) under the sensor pair at hand speed; scope IR1/IR2 and confirm both channels toggle cleanly with the expected left/right ordering and no chatter at the print edges beyond the soft tens-of-µs transitions.
4. Matching: with both sensors over the same uniform white field, the two readings should agree within the value recorded in D.5; a gross mismatch (one saturated, one not) means the pair spans the IC(ON) spec spread — usable for thresholded line-follow only if both still pass step 2.

F. Release-only tests#

Temperature behavior (LED output falls and dark current rises when hot; both sides derate 1 mW/°C), lifetime LED degradation at continuous 21 mA, sunlight/IR-flood immunity limits, and conveyor-speed dynamic response are release-scope items. The PCB layout (sensor height, co-planarity, silk keep-out around the optical faces) does not exist yet and gates all optical results above.

10. Troubleshooting map#

11. Bench record template#

12. Review conclusion#

The circuit is a textbook reflective-pair front end and the component choices are internally consistent: the 100 Ω ballast puts the LED at the datasheet's own 20 mA test condition, and the 10 kΩ collector load buys enough gain that typical parts saturate over white paper at the ~1 mm optimum the datasheet's distance curve verifies. The honest risks are spec-spread and mechanics, not topology: a minimum-IC(ON) unit may fail to reach a valid CMOS low (measure every unit against the host's VIL, per procedure E), channel-to-channel matching is not guaranteed by the datasheet, ambient IR is a genuine interferer, and the 1 mm working height is a PCB/chassis requirement that no layout yet implements. One documentation bug (the generator's "~28 mA" heading text vs the calculated 21 mA) should be corrected at the next design edit. Nothing in this guide substitutes for first-article measurement.