Sensor modules
AXS-025 — LD2410C mmWave presence carrier PMOD module
Catalog #25 in the AruviX sensor line, level L4 (UART binary protocol + simple presence GPIO).
Circuit review & bench-test guide →
Components#
Every placed component, with the reason it is on the board. Extracted directly from the schematic, so this cannot drift from the design.
| Ref | Value | What it does on this board | Part number | Footprint |
|---|---|---|---|---|
C1 |
100nF 16V X7R | Socket decoupling | GRM188R71C104KA01DMurata |
C_0603_1608Metric |
C2 |
10uF 10V X5R | Radar chirp-current bulk reservoir at the socket | GRM21BR61A106KE19LMurata |
C_0805_2012Metric |
J1 |
PMOD PLUG 2x6 | PMOD peripheral plug (Digilent spec 1.2) | not selected generic |
PinHeader_2x06_P2.54mm_Horizontal |
J2 |
LD2410C HEADER | LD2410C 1.27 mm header: 1 VCC(3V3), 2 GND, 3 OUT, 4 RX (host TXD), 5 TX | not selected generic |
PinHeader_1x05_P1.27mm_Vertical |
R1 |
100R | Series protection on the module-driven presence output | RC0603FR-07100RLYageo Datasheet ↗ |
R_0603_1608Metric |
R2 |
100R | Series protection on the module-driven UART TX line | RC0603FR-07100RLYageo Datasheet ↗ |
R_0603_1608Metric |
Signals#
Net labels used in the schematic, which are also the names the HDL top level should use.
3V3 GND LD_OUT LD_TX PRESENCE RXD TXD
Production status#
| Schematic ERC | 0 violations |
|---|---|
| PCB layout | complete |
| DRC | 0 violations |
| Fab package | exported (24 gerbers + drill + CPL + BOM) |
| Fabricated | no — design stage only |
Source: boards/sensor-modules/axs-025-mmwave
Catalog #25 in the AruviX sensor line (../README.md), level L4 (UART binary protocol + simple presence GPIO).
Status: schematic generated, ERC clean (0/0), netlist reviewed. PCB layout not started. Not released.
What it teaches#
Two abstraction levels of the same sensor. The OUT pin (PMOD pin 1) is a plain presence GPIO — usable on day one. The UART carries the LD2410 binary protocol at 256000 baud: command/ack framing, periodic data frames with moving/static distance gates and per-gate energy values, and an engineering mode — a substantially richer protocol parser than NMEA, hence L4.
Which module variant (important)#
This carrier targets the HiLink LD2410C, which accepts a 3.3 V supply. The plain LD2410 requires 5 V and must not be fitted — there is no 5 V on this board. The pin order used for J2 (LD2410C 1.27 mm 5-pin header):
1 VCC (3V3), 2 GND, 3 OUT, 4 RX, 5 TX
This order is taken from the vendor drawing; clones circulate with other orders — verify against your purchased module before soldering the socket.
Design#
- J2 = 1×5 header, 1.27 mm pitch (
Connector_PinHeader_1.27mm:PinHeader_1x05_P1.27mm_Vertical, MPNTBD:). - 100 Ω series on both module-driven lines: OUT (→
PRESENCE) and TX (→ RXD). - Host TXD drives the module RX directly (host-driven line).
- 100 nF + 10 µF at the socket (radar chirp current).
- PMOD Type 3 UART with the presence output in the pin-1 position.
| PMOD pin | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Net | PRESENCE | TXD | RXD | NC | GND | 3V3 | NC | NC | NC | NC | GND | 3V3 |
Regenerate#
python3 generate_design.py
Remaining for release#
- [ ] PCB layout (keep the radar antenna face clear of copper), DRC, fab
- [ ] Pin the 1.27 mm header/socket orderable part (MPN is
TBD:) - [ ] Verify LD2410C pinout against a purchased module
- [ ]
hdl/: UART core at 256000 baud, protocol parser, presence debounce, testbench, ECP5 demo - [ ] BOM export and availability check, design-review checklist