Power boards

Selectable USB-C PD trigger

No fab package 55 components
3D render of the usb-c-pd-trigger PCB
Rendered from the PCB layout. No physical board has been manufactured.

Circuit review & bench-test guide →

Components#

Every placed component, with the reason it is on the board. Extracted directly from the schematic, so this cannot drift from the design.

RefValueWhat it does on this boardPart numberFootprint
C1 2.2uF 50V X7R GRM31CR71H225KA88L
Murata
C_1206_3216Metric
C2 1uF 10V X7R GRM188R71A105KA61D
Murata
C_0603_1608Metric
C3 330pF 50V C0G GRM1885C1H331JA01D
Murata
C_0603_1608Metric
C4 2.2nF 50V C0G GRM1885C1H222JA01D
Murata
C_0603_1608Metric
C5 1uF 50V X7R GRM21BR71H105KA12L
Murata
C_0805_2012Metric
C6 10uF 50V X7R GRM32ER71H106KA12L
Murata
C_1210_3225Metric
C8 4.7nF 50V C0G GRM1885C1H472JA01D
Murata
C_0603_1608Metric
D1 TVS2200 22 V flat-clamp VBUS surge protector TVS2200DRVR
Texas Instruments
Datasheet ↗
WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm
D2 B340A Negative VBUS transient clamp B340A-13-F
Diodes Incorporated
Datasheet ↗
D_SMA
D3 BZT52H-C10 10 V PMOS gate-source clamp BZT52H-C10,115
Nexperia
Datasheet ↗
D_SOD-123F
D4 PD FAULT RED APT1608SURCK
Kingbright
LED_0603_1608Metric
D5 PMEG4010EH Negative output transient clamp PMEG4010EH,115
Nexperia
Datasheet ↗
D_SOD-123F
D6 OUTPUT GREEN APT1608SGC
Kingbright
LED_0603_1608Metric
D7 EFUSE FAULT RED DNP APT1608SURCK
Kingbright
LED_0603_1608Metric
J1 USB4105-GF-A-120 USB Type-C USB2.0 receptacle USB4105-GF-A-120
GCT
Datasheet ↗
USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_Horizontal
J2 DP5T SELECTOR HARNESS SMT panel-selector harness connector SM12B-SRSS-TB(LF)(SN)
JST
Datasheet ↗
JST_SH_SM12B-SRSS-TB_1x12-1MP_P1.00mm_Horizontal
J3 DP5T SELECTOR DEV DNP Optional selector breadboard header PinHeader_2x06_P2.54mm_Vertical
J4 FULL LOAD SMT POWER OUT Tape-and-reel Micro-Fit 3.0 full-load output 43650-0210
Molex
Datasheet ↗
Molex_Micro-Fit_3.0_43650-0210_1x02-1MP_P3.00mm_Horizontal_PnP
J5 BREADBOARD LIGHT LOAD <=0.5A DNP Optional duplicated light-load header PinHeader_1x04_P2.54mm_Vertical
J6 STATUS / MEASURE DNP Optional status header PinHeader_1x04_P2.54mm_Vertical
Q1 DMP4015SSS-13 40 V P-channel contract switch DMP4015SSS-13
Diodes Incorporated
Datasheet ↗
SO-8_3.9x4.9mm_P1.27mm
R1 900k 1% RC0603FR-07900KL
Yageo
Datasheet ↗
R_0603_1608Metric
R2 900k 1% RC0603FR-07900KL
Yageo
Datasheet ↗
R_0603_1608Metric
R3 21.0k 1% RC0603FR-0721KL
Yageo
Datasheet ↗
R_0603_1608Metric
R4 2.2k RC0603FR-072K2L
Yageo
Datasheet ↗
R_0603_1608Metric
R5 10k RC0603FR-0710KL
Yageo
Datasheet ↗
R_0603_1608Metric
R6 100k RC0603FR-07100KL
Yageo
Datasheet ↗
R_0603_1608Metric
R7 0R 1% RC0603JR-070RL
Yageo
Datasheet ↗
R_0603_1608Metric
R8 3.00k 1% RC0603FR-073KL
Yageo
Datasheet ↗
R_0603_1608Metric
R9 6.04k 1% RC0603FR-076K04L
Yageo
Datasheet ↗
R_0603_1608Metric
R10 11.0k 1% RC0603FR-0711KL
Yageo
Datasheet ↗
R_0603_1608Metric
R11 19.1k 1% RC0603FR-0719K1L
Yageo
Datasheet ↗
R_0603_1608Metric
R12 470k 1% RC0603FR-07470KL
Yageo
Datasheet ↗
R_0603_1608Metric_NoSilk
R14 1.74M 1% RC0603FR-071M74L
Yageo
Datasheet ↗
R_0603_1608Metric_NoSilk
R15 100k 1% RC0603FR-07100KL
Yageo
Datasheet ↗
R_0603_1608Metric_NoSilk
R16 47k DNP RC0603FR-0747KL
Yageo
Datasheet ↗
R_0603_1608Metric_NoSilk
R17 976R 1% RC0603FR-07976RL
Yageo
Datasheet ↗
R_0603_1608Metric
R18 187k 1% RC0603FR-07187KL
Yageo
Datasheet ↗
R_0603_1608Metric_NoSilk
R19 33.0k 1% RC0603FR-0733KL
Yageo
Datasheet ↗
R_0603_1608Metric_NoSilk
R20 4.7k RC0603FR-074K7L
Yageo
Datasheet ↗
R_0603_1608Metric_NoSilk
R21 10k DNP RC0603FR-0710KL
Yageo
Datasheet ↗
R_0603_1608Metric_NoSilk
R22 1M RC0603FR-071ML
Yageo
Datasheet ↗
R_0603_1608Metric
R23 0R SHIELD LINK DNP RC0603JR-070RL
Yageo
Datasheet ↗
R_0603_1608Metric
TP1 VBUS_RAW DNP Electrical test point TestPoint_Plated_Hole_D2.0mm
TP2 PD_VBUS DNP Electrical test point TestPoint_Plated_Hole_D2.0mm
TP3 VOUT DNP Electrical test point TestPoint_Plated_Hole_D2.0mm
TP4 VOUT_SENSE DNP Electrical test point TestPoint_Plated_Hole_D2.0mm
TP5 CC1 DNP Low-capacitance USB-PD CC probe pad CC_TestPoint_D0.6mm
TP6 CC2 DNP Low-capacitance USB-PD CC probe pad CC_TestPoint_D0.6mm
TP7 GND DNP Electrical test point TestPoint_Plated_Hole_D2.0mm
TP8 SNK_VSET DNP Electrical test point TestPoint_Plated_Hole_D2.0mm
TP9 HUSB_EN_N DNP Electrical test point TestPoint_Plated_Hole_D2.0mm
TP10 PMOS_GATE DNP Electrical test point TestPoint_Plated_Hole_D2.0mm
U1 HUSB238A-BB001 Autonomous USB PD sink controller HUSB238A-BB001
Hynetek
Datasheet ↗
QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm_ThermalVias
U2 TPS259470A Reverse-blocking active-current-limit eFuse TPS259470ARPWR
Texas Instruments
Datasheet ↗
Texas_RPW0010A_VQFN-HR-10_2x2mm_P0.45mm

Signals#

Net labels used in the schematic, which are also the names the HDL top level should use.

CC1 CC2 DEBUG_N EFUSE_DVDT EFUSE_FLT_N EFUSE_ILM EFUSE_ITIMER EFUSE_LED_A EFUSE_OVLO EN_HVDCP EN_UVLO GND HUSB_EN_N HUSB_GATE HUSB_VDD PD_FAULT PD_FAULT_LED_A PD_VBUS PMOS_GATE SNK_ISET SNK_VSET USB_DM USB_DP USB_SHIELD VBUS_RAW VOUT VOUT_LED_A VOUT_SENSE VSET_12 VSET_15 VSET_20 VSET_5 VSET_9

Production status#

Schematic ERCnot run
PCB layoutcomplete
DRCnot run
Fab packagenot exported
Fabricatedno — design stage only

Source: boards/usb-c-pd-trigger


Status#

Revision 0.1 is an actively generated KiCad design. It is a 60 W-class, power-only USB-C Power Delivery sink with a five-position voltage selector, contract-controlled disconnect, protected 3 A output, terminal output, and a light-load breadboard interface.

The design sources and generated artifacts all live in this folder. The routed usb-c-pd-trigger.kicad_pcb is the controlled production source. Run generate_design.py to rebuild the schematic and project libraries; generate_pcb.py creates an explicitly named unrouted placement/plane foundation for routing experiments and will not overwrite the reviewed board without --force. finalize_routing.py reapplies the reviewed footprints, qualified metadata, and plane transfers to the controlled routed PCB.

Run the complete release gate with:

python3 boards/usb-c-pd-trigger/qa/run_release_qa.py --refresh --strict
python3 boards/usb-c-pd-trigger/qa/validate_report.py

The generated HTML QA report is the release index for CAD, analysis, simulation, manufacturing, bench, and certification evidence.

Electrical architecture#

USB-C receptacle
  |-- CC1/CC2, D+/D- --> HUSB238A-BB001 autonomous PD sink
  |                         |-- SNK_VSET <- fail-safe 2-pole selector
  |                         |-- SNK_ISET = 21.0 kOhm (3 A request)
  |                         `-- GATE --> 40 V P-MOSFET contract switch
  |
  `-- VBUS_RAW --> TVS2200 --> contract PMOS --> TPS259470A eFuse --> VOUT
                                                         |        |-- terminal
                                                         |        `-- light-load header
                                                         `-- current limit, inrush,
                                                             UVLO/OVLO, reverse block

HUSB238A-BB001 is frozen because Hynetek identifies it as the no-SOP-prime orderable variant. The board only uses conventional SPR fixed PDOs up to 20 V. PPS, AVS, EPR, and 5 A operation are intentionally out of scope.

Fail-safe selector#

A simple one-pole rotary is not acceptable here: HUSB238A interprets an open SNK_VSET as its highest voltage code. Revision 0.1 therefore uses a break-before-make 2-pole, 5-position selector:

PositionSNK_VSETPreferred voltage ceiling
10 Ohm5 V
23.00 kOhm, 1%9 V
36.04 kOhm, 1%12 V
411.0 kOhm, 1%15 V
519.1 kOhm, 1%20 V

SNK_ISET uses 21.0 kOhm, 1%, for a preferred 3 A request. The knob is a ceiling, not a voltmeter: HUSB238A searches downward for the highest source PDO that does not exceed the selected voltage and can supply the requested current. If no source PDO meets both requirements, it reports a capability mismatch. Always measure VOUT before connecting a voltage-sensitive load.

Selector interfaces#

The panel switch/harness is a mechanical subassembly rather than a reflowed component. This keeps the core PCB compatible with automated SMT assembly and lets the rotary control mount to an enclosure without stressing the PCB.

Protection and operating limits#

Outputs and measurements#

Assembly variants#

Release status#

The automated QA report distinguishes CAD/analysis evidence from physical evidence. The current rev-0.1 release has 41 PASS, 5 CONDITIONAL, 18 OPEN, and 0 FAIL results. Passing ERC, DRC, corner calculations, simulations, BOM/PnP parity, and fabrication-file checks does not constitute USB-IF, FCC, CE, UL, or other certification. Hardware remains prototype-only until every required bench and certification item in the HTML report is closed.

Primary references#